Title :
An FPGA Implementation of the ZUC Stream Cipher
Author :
Kitsos, Paris ; Sklavos, Nicolas ; Skodras, Athanassios N.
Author_Institution :
Comput. Sci., Hellenic Open Univ., Patras, Greece
Abstract :
In this paper a hardware implementation of ZUC stream cipher is presented. ZUC is a stream cipher that forms the heart of the 3GPP confidentiality algorithm 128-EEA3 and the 3GPP integrity algorithm 128-EIA3, offering reliable security services in Long Term Evolution networks (LTE). A detailed hardware implementation is presented in order to reach satisfactory performance results in LTE systems. The design was coded using VHDL language and for the hardware implementation, a XILINX Virtex-5 FPGA was used. Experimental results in terms of performance and hardware resources are presented.
Keywords :
3G mobile communication; Long Term Evolution; cryptography; field programmable gate arrays; hardware description languages; telecommunication security; 128-EEA3 algorithm; 128-EIA3 algorithm; 3GPP confidentiality algorithm; 3GPP integrity algorithm; Long Term Evolution networks; VHDL language; XILINX Virtex-5 FPGA; ZUC stream cipher; hardware implementation; security service; Adders; Algorithm design and analysis; Clocks; Field programmable gate arrays; Hardware; Registers; Signal processing algorithms; FPGA; Hardware implementation; Long Term Evolution networks security; Zuc stream cipher;
Conference_Titel :
Digital System Design (DSD), 2011 14th Euromicro Conference on
Conference_Location :
Oulu
Print_ISBN :
978-1-4577-1048-3
DOI :
10.1109/DSD.2011.109
