• DocumentCode
    158091
  • Title

    Reducing Data Copies between GPUs and NICs

  • Author

    Nguyen, Anh ; Fujii, Yuka ; Iida, Yuki ; Azumi, Takuya ; Nishio, Nobuhiko ; Kato, Shigeo

  • fYear
    2014
  • fDate
    25-26 Aug. 2014
  • Firstpage
    37
  • Lastpage
    42
  • Abstract
    Cyber-physical systems (CPS) must perform complex algorithms at very high speed to monitor and control complex real-world phenomena. GPU, with a large number of cores and extremely high parallel processing, promises better computation if the data parallelism often found in real-world scenarios of CPS could be exploited. Nevertheless, its performance is limited by the latency incurred when data are transferred between GPU memory and I/O devices. This paper describes a method, based on zero-copy processing, for data transmission between GPUs and NICs. The arrangement enables NICs to directly transfer data to and from GPU. Experimental results show effective data throughput without packet loss.
  • Keywords
    electronic data interchange; graphics processing units; parallel processing; CPS; GPU memory; I/O devices; NIC; complex algorithms; complex real-world phenomena; cyber physical systems; data copies; data parallelism; data transmission; packet loss; parallel processing; transfer data; zero-copy processing; Buffer storage; Data communication; Data models; Educational institutions; Graphics processing units; Kernel; Protocols; Data Transfer; GPGPU; GPU; Low Latency;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Cyber-Physical Systems, Networks, and Applications (CPSNA), 2014 IEEE International Conference on
  • Conference_Location
    Hong Kong
  • Type

    conf

  • DOI
    10.1109/CPSNA.2014.15
  • Filename
    6961240