DocumentCode
15819
Title
Maximum Convex Subgraphs Under I/O Constraint for Automatic Identification of Custom Instructions
Author
Giaquinta, Emanuele ; Mishra, Anadi ; Pozzi, Laura
Author_Institution
Dept. of Comput. Sci. & Eng., Aalto Univ., Espoo, Finland
Volume
34
Issue
3
fYear
2015
fDate
Mar-15
Firstpage
483
Lastpage
494
Abstract
Automatic identification of custom instructions (CI) is the process of supporting the programmer in choosing automatically beneficial parts of the application source code that can then be synthesized and run on dedicated hardware. Identification is typically modeled as choosing a subgraph from a graph, representing the application, that has the highest speedup potential when implemented in custom hardware, and that fulfills the constraints of convexity and of a given maximum number of inputs and outputs. Existing algorithms for CI identification either enumerate all the valid subgraphs under the constraints of convexity and I/O, or return the subset of all maximal valid subgraphs with respect to convexity only. The downside of the former approach is that enumerating all valid subgraphs is costly, especially for large values of input and output constraints, while we may be interested in the subgraphs which obtain the best speedup only. Instead, the latter approach may fail to find a feasible solution, since the valid subgraphs with respect to convexity only can be too large to be useful. In this paper, we present a novel approach which attempts to fill the gap between the existing methods. In particular, we present an algorithm that enumerates the subset of all maximum valid subgraphs with respect to convexity and number of inputs and outputs. Our method revisits and combines the existing approaches and yields an algorithm which is effective and outperforms the state-of-the-art for large values of input and output constraints.
Keywords
constraint handling; graph theory; instruction sets; source code (software); CI; IO constraint; application source code; automatic custom instructions identification; convexity constraints; input constraints; maximum convex subgraphs; output constraints; Algorithm design and analysis; Application specific integrated circuits; Benchmark testing; Clustering algorithms; Hardware; Program processors; Time complexity; ASIPs; Application specific processors; Customizable Processors; Hardware Software Codesign; customizable processors; hardware software codesign;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2014.2387375
Filename
7008460
Link To Document