DocumentCode :
1582300
Title :
Study of a SONET STS-3c based ATM user network interface design
Author :
Phung, Kien Du ; Dimalanta, Antonio R., Jr.
Author_Institution :
National Semiconductor, Santa Clara, CA, USA
fYear :
1993
Firstpage :
366
Lastpage :
369
Abstract :
The authors analyze the serial and parallem implementation of a SONET STS-3c based asynchronous transfer mode (ATM) user network interface design. The tradeoffs between both serial and parallel desings of the SONET scrambler and the ATM physical layer cyclic redundancy code (CRC) generator are analyzed in terms of gate count and power dissipation. The result of the analysis shows that an 8-b parallel processing of the ATM header CRC and the SONET scrambler offers the optimal solution in terms of performance and cost of implementation
Keywords :
B-ISDN; CMOS logic circuits; SONET; application specific integrated circuits; asynchronous transfer mode; cyclic codes; data communication; data communication equipment; network interfaces; parallel processing; shift registers; telecommunication computing; ASIC; ATM user network interface design; B-ISDN; CMOS IC; SONET STS-3c based; SONET scrambler; cost of implementation; cyclic redundancy code generator; design complexity; gate count; optimal solution; parallem implementation; physical layer protocol; power dissipation; serial implementation; tradeoffs; Asynchronous transfer mode; Cost function; Cyclic redundancy check; Network interfaces; Parallel processing; Performance analysis; Physical layer; Power dissipation; Power generation; SONET;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-1375-5
Type :
conf
DOI :
10.1109/ASIC.1993.410740
Filename :
410740
Link To Document :
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