DocumentCode
1582706
Title
Live in-service modification of optical network elements implemented with Xilinx FPGAs
Author
Brebner, Gordon
Author_Institution
Xilinx Res. Labs., San Jose, CA, USA
fYear
2011
Firstpage
1
Lastpage
3
Abstract
This paper demonstrates that Xilinx FPGA partial reconfiguration technology can yield resource and power savings in optical network elements through selective hardware modification during live operation, illustrated by two examples: data framing and EFEC calculation.
Keywords
field programmable gate arrays; optical elements; optical fibre networks; EFEC calculation; Xilinx FPGA partial reconfiguration technology; data framing; live in-service modification; live operation; optical network elements; power savings; selective hardware modification; Arrays; Clocks; Field programmable gate arrays; Forward error correction; Hardware; Optical fiber networks; Optical fibers;
fLanguage
English
Publisher
ieee
Conference_Titel
Optical Fiber Communication Conference and Exposition (OFC/NFOEC), 2011 and the National Fiber Optic Engineers Conference
Conference_Location
Los Angeles, CA
ISSN
pending
Print_ISBN
978-1-4577-0213-6
Type
conf
Filename
5875250
Link To Document