Title :
A semicustom implemented connection matrix for SDH systems
Author :
Traverso, G. ; Golin, Pais O. ; Lometti, A.
Author_Institution :
Alcatel-Telettra, Milan, Italy
Abstract :
The introduction of the synchronous digital hierarchy (SDH) in digital communications has emphasized the importance of implementing complex and compact matrix devices, inside the network nodes. The authors introduce the ASIC Matisse, which performs a complete, rearrangeable connection matrix among 16 input Synchronous Transport Module-1 (STM1) frames (up to 1008 Virtual Container-12 (VC12) synchronous 2.048-Mb/s tributaries), and eight output STM1 frames (up to 504 VC12s), in a 235 K-usable-gate, sea-of-gates chip. Two features are pointed out: modular architecture partitioning in N × 4 submatrices, making routing feasible; and coprocessing capability, making real-time programming feasible
Keywords :
application specific integrated circuits; coprocessors; digital communication; logic arrays; multiplexing equipment; synchronous digital hierarchy; 2.048 Mbit/s; ASIC Matisse; SDH systems; Synchronous Transport Module-1; Virtual Container-12; coprocessing capability; digital communications; modular architecture partitioning; programming coprocessor; real-time programming; sea-of-gates chip; semicustom implemented connection matrix; submatrices; Add-drop multiplexers; Application specific integrated circuits; Costs; Digital communication; Fabrics; Multiplexing; Read-write memory; Research and development; Switches; Synchronous digital hierarchy;
Conference_Titel :
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-1375-5
DOI :
10.1109/ASIC.1993.410743
