Title :
A 5-GHz direct-conversion receiver with I/Q phase and gain error calibration [WLAN applications]
Author :
Chen, Wei-Zen ; Lee, Tsomg-Lin ; Lu, Tai-You
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan
Abstract :
This paper describes the design of a 5-GHz direct conversion receiver with phase and gain error calibration for WLAN applications. Integrating both LNA and mixer in a single chip, the conversion gain of the RF receiver is switchable to compromise between linearity and noise performance. In addition, calibration schemes are proposed to compensate gain and phase errors in the I/Q signal paths. By means of this technique, the measured phase error is reduced to less than 0.6° and gain error less than 0.2 dB. The receiver provides a conversion gain of 28.2 dB in the high gain mode and 11.6 dB in the low gain mode within the signal bandwidth. The overall noise figure is 6.4 dB in the high gain mode, and the third-order input intercept point (IIP3) is about -6.8 dBm in the low gain mode. Implemented in a 0.18-μm CMOS technology, it consumes 37.4 mW from a 1.8 V supply. The chip area is 1.64 mm2.
Keywords :
CMOS integrated circuits; MMIC amplifiers; MMIC mixers; calibration; error compensation; radio receivers; wireless LAN; 0.18 micron; 1.8 V; 11.6 dB; 28.2 dB; 37.4 mW; 5 GHz; 6.4 dB; CMOS; I/Q phase error calibration; LNA; WLAN; conversion gain; direct-conversion receiver; error compensation; gain error calibration; linearity/noise compromise; mixer; switchable conversion gain; Bandwidth; CMOS technology; Calibration; Gain measurement; Linearity; Performance gain; Phase measurement; Radio frequency; Semiconductor device measurement; Wireless LAN;
Conference_Titel :
Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE
Print_ISBN :
0-7803-8983-2
DOI :
10.1109/RFIC.2005.1489630