Title :
Next Standard Packaging Method for DRAM - Chip-in-Substrate Package
Author :
Ko, Cheng-Ta ; Chang, Tao-Chih ; Chiang, Chia-Wen ; Kuo, Tzu-Ying ; Shih, Ying-Ching ; Chen, Yu-Hua
Author_Institution :
Lab. of Electron. & Optoelectron. Res., Ind. Technol. Res. Inst., Hsinchu
Abstract :
Chip-in-substrate package (CiSP) is an embedded active device packaging technology. In this research, DDRII memory was chosen as the CiSP test vehicle. Several techniques were well developed to achieve CiSP with high yield and good reliability. The vehicle was tested by lead-free reliability tests, inclusive of pre-condition level-3 (3 reflows at 260degC), level B thermal cycle, 168 hrs pressure cooker, and 100 cycles thermal shock, to completely qualify CiSP technology
Keywords :
DRAM chips; chip scale packaging; CiSP test vehicle; DDRII memory; DRAM; active device packaging technology; chip-in-substrate package; lead-free reliability tests; standard packaging method; Electronic packaging thermal management; Electronics packaging; Inductance; Parasitic capacitance; Plasma applications; Random access memory; Semiconductor device packaging; Substrates; Testing; Vehicles;
Conference_Titel :
Microsystems, Packaging, Assembly Conference Taiwan, 2006. IMPACT 2006. International
Conference_Location :
Taipei
Print_ISBN :
1-4244-0735-4
Electronic_ISBN :
1-4244-0735-4
DOI :
10.1109/IMPACT.2006.312198
