Integration of SDL and VHDL for HW/SW codesign of communication systems

This paper integrates SDL and VHDL for HW/SW codesign of communication systems. An SDL-based process model graph is built first for the initial software structure, and then is partitioned for implementation into hardware and software. Processes shifted from software to hardware need to be translated from SDL (EFSM) specification to VHDL specification. Implementation dependent information for both software and hardware processes are obtained and incorporated into an SDL-based functional design, to form the performance model of the system with certain HW/SW partitioning. This means that the proposed methodology also provides mechanisms to translate VHDL behavior models into SDL processes. This paper also presents the partitioning algorithm and the detailed performance evaluation procedure of the proposed codesign methodology.