Title :
An analog discrete-time transversal filter in 2.0 μm CMOS
Author :
Lyle, Stephen ; Worstell, Glen ; Spencer, Richard
Author_Institution :
Dept. of Electron. & Comput. Eng., California Univ., Davis, CA, USA
Abstract :
The implementation of analog discrete-time transversal filters using track-and-holds (T/Hs) as delay elements is addressed. With a classic linear tapped-delay line topology, the sampling rate is typically limited by the acquisition time of the T/Hs. To overcome this limitation, a circular architecture has been developed. The chip presented is the first demonstration of the circular architecture. A four-tap equalizer has been fabricated in a 2-μm CMOS process, dissipates 148 mW when running at 30 MHz, and has a total area of 4.8 mm 2
Keywords :
CMOS integrated circuits; active filters; analogue processing circuits; delay lines; equalisers; 148 mW; 2.0 micron; 30 MHz; CMOS; acquisition time; analog discrete-time transversal filter; circular architecture; four-tap equalizer; linear tapped-delay line topology; total area; track-and-hold delay elements; Adaptive filters; Decision feedback equalizers; Detectors; Drives; Finite impulse response filter; Intersymbol interference; Laboratories; Noise cancellation; Sampling methods; Transversal filters;
Conference_Titel :
Signals, Systems and Computers, 1992. 1992 Conference Record of The Twenty-Sixth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
Print_ISBN :
0-8186-3160-0
DOI :
10.1109/ACSSC.1992.269076
