A Numerical Study of Board-level Stacked-die Packages Under Coupled Power and Thermal Cycling Test Conditions

Author

Tong Hong Wang ; Lee, Chang-Chi ; Ching-Chun Wang ; Lai, Yi-Shao

Author_Institution

Advanced Semicond. Eng. Inc., Kaohsiung

fYear

2006

Firstpage

1

Lastpage

4

Abstract

In this study, the sequential thermal-mechanical coupling analysis, which solves in turn the transient temperature field and subsequent thermomechanical deformations, is performed to investigate thermal characteristics along with fatigue reliability of board-level stacked-die thin-profile fine-pitch ball grid array chip-scale packages under coupled power and thermal cycling test conditions. Effects of different power dissipation conditions are examined and compared

Keywords

ball grid arrays; chip scale packaging; deformation; fatigue; fine-pitch technology; finite element analysis; integrated circuit reliability; integrated circuit testing; mechanical testing; board-level stacked-die packages; chip-scale packages; coupled power; fatigue reliability; finite element model; numerical analysis; sequential thermal-mechanical coupling analysis; thermal cycling test conditions; thermomechanical deformations; thin-profile fine-pitch ball grid array; transient temperature field; Chip scale packaging; Electronics packaging; Fatigue; Performance analysis; Performance evaluation; Sequential analysis; Temperature; Testing; Thermomechanical processes; Transient analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Microsystems, Packaging, Assembly Conference Taiwan, 2006. IMPACT 2006. International

Conference_Location

Taipei

Print_ISBN

1-4244-0735-4

Electronic_ISBN

1-4244-0735-4

Type

conf

DOI

10.1109/IMPACT.2006.312205

Filename

4107462