Design and cost evaluation of simple interconnection circuits for multiprocessor systems

Author

Camarda, P. ; Castagnolo, B. ; Corsi, F. ; Di Lecce, V.

Author_Institution

Dipartimento di Elettronica ed Elettrotecnica, Univ. degli Studi, Bari, Italy

fYear

1988

Firstpage

185

Abstract

The generalized hypercube (GHC) interconnection network is used in the design of a processor for parallel implementation of a 2D-FFT (two-dimensional fast Fourier transform) algorithm. An interface has been designed, up to layout level, capable of signalling transmission errors, utilizing in this way the characteristics of the structure. The design has also allowed the determination of the cost of the network: although the pure hardware cost is higher with respect to other simpler structures; the cost/performance ratio still favours the GHC.<>

Keywords

computer interfaces; economics; fast Fourier transforms; multiprocessor interconnection networks; parallel processing; 2D-FFT algorithm; cost evaluation; cost/performance ratio; generalized hypercube network; interconnection circuits; interface; layout level; multiprocessor systems; parallel implementation; transmission error signalling; two-dimensional fast Fourier transform; Computer architecture; Concurrent computing; Cost function; Fault tolerance; Hypercubes; Integrated circuit interconnections; Multidimensional systems; Multiprocessing systems; Multiprocessor interconnection networks; Performance evaluation;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1988., IEEE International Symposium on

Conference_Location

Espoo, Finland

Type

conf

DOI

10.1109/ISCAS.1988.14897

Filename

14897