Title :
A low power high performance CMOS voltage-mode quaternary full adder
Author :
Da Silva, Ricardo Cunha Gonçalves ; Boudinov, Henri Ivanov ; Carro, Luigi
Author_Institution :
Univ. Fed. do Rio Grande do Sul, Porto Alegre
Abstract :
Multiple-valued logic, despite of all its theoretical potentialities, has not provided real advantages for arithmetic circuits when compared to the binary equivalent ones until now. This paper shows a new efficient method to implement quaternary logic arithmetic circuits using multi-threshold transistors, where 3 power supply lines are used to perform quaternary circuits with low power consumption and high performance. As a demonstration, a quaternary full adder is described in TSMC 0.18mum technology and compared to regular binary circuits, presenting a 76% reduction in power consumption, and an improvement of 15% regarding speed with a 20% area overhead
Keywords :
CMOS integrated circuits; adders; digital arithmetic; logic circuits; 0.18 micron; TSMC technology; low power high performance CMOS; multi threshold transistors; quaternary full adder; quaternary logic arithmetic circuits; voltage mode; Adders; Arithmetic; CMOS logic circuits; CMOS technology; Clocks; Energy consumption; Frequency; Multivalued logic; Power dissipation; Voltage;
Conference_Titel :
Very Large Scale Integration, 2006 IFIP International Conference on
Conference_Location :
Nice
Print_ISBN :
3-901882-19-7
DOI :
10.1109/VLSISOC.2006.313231
