DocumentCode
1586334
Title
Design of a Reconfigurable Multiprocessor Core for Higher Performance and Reliability of Embedded Systems
Author
Kshirsagar, R.V. ; Patrikar, R.M.
Author_Institution
Priyadarshini Coll. Of Engg. & Arch., Nagpur
fYear
2006
Firstpage
251
Lastpage
254
Abstract
In this paper design of multiprocessor core for embedded systems is discussed. The advantage of computational performance of FPGA based reconfigurable systems for embedded system is combined with fault tolerance capability of reconfigurable system. A general purpose processor is attached with reconfigurable co-processor for enhanced performance. The unit is replicated for enhanced performance and fault tolerance. The processors are communicating through central reconfiguration unit. This unit is hardware reconfigurable and uses spare logic elements in the FPGA in case of failure. The system is scalable and illustrated here for four processors
Keywords
circuit reliability; embedded systems; field programmable gate arrays; microprocessor chips; FPGA; computational performance; embedded system reliability; reconfigurable multiprocessor; Coprocessors; Embedded system; Fault tolerance; Field programmable gate arrays; Hardware; Microprocessors; Parallel processing; Reconfigurable logic; Runtime; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration, 2006 IFIP International Conference on
Conference_Location
Nice
Print_ISBN
3-901882-19-7
Type
conf
DOI
10.1109/VLSISOC.2006.313242
Filename
4107638
Link To Document