DocumentCode
1587727
Title
Design and application of FIFO based on CPLD
Author
Liao, Xiaoqun ; Fu, Xing
Author_Institution
Xi´´an University Of Science And Technology, XUST, China
fYear
2012
Firstpage
1
Lastpage
3
Abstract
In the distribution feeder automation systems, to achieve the requirement of 5K–10K data amount between each device within 5ms, the solution of the implementation of FIFO data buffer which is based on CPLD is proposed in this paper. Through analyzing on the FIFO module characteristics, composition and working principle, the FIFO module logic principle diagram based on CPLD is designed, and all of its feature implementations are described using Verilog HDL. At present, the scheme has been applied in the systems of distribution feeder automation, through detecting, which meets the system performance demands.
Keywords
CPLD; Data cache; FIFO; FTU; Real-time monitoring;
fLanguage
English
Publisher
ieee
Conference_Titel
World Automation Congress (WAC), 2012
Conference_Location
Puerto Vallarta, Mexico
ISSN
2154-4824
Print_ISBN
978-1-4673-4497-5
Type
conf
Filename
6321581
Link To Document