DocumentCode :
1587781
Title :
Implementation of bit-level pipelined digit-serial multipliers
Author :
Landernäs, Krister ; Holmberg, Johnny ; Gustafsson, Oscar
Author_Institution :
Malardalen University
fYear :
2004
Firstpage :
125
Lastpage :
128
Keywords :
Adders; Arithmetic; Circuits; Delay; Digital filters; Energy consumption; Frequency estimation; Pipeline processing; Power dissipation; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Symposium, 2004. NORSIG 2004. Proceedings of the 6th Nordic
Conference_Location :
Espoo, Finland
Print_ISBN :
951-22-7065-X
Type :
conf
Filename :
1344539
Link To Document :
بازگشت