Title :
A minimum-area floorplanning algorithm for MBC designs
Author :
Mehta, Dinesh P. ; Sherwani, Naveed
Author_Institution :
Space Inst., Tennessee Univ., TN, USA
Abstract :
This paper identifies important objectives that an MBC floorplanner using flexible, arbitrary rectilinear shapes for standard cell regions should achieve including area minimization, proximity, and connectivity. It then presents an algorithm that guarantees area minimization and connectivity and gives good results with respect to proximity
Keywords :
cellular arrays; circuit optimisation; integrated circuit layout; minimisation; MBC design; area minimization; connectivity; floorplanning algorithm; proximity; rectilinear shapes; standard cell; Algorithm design and analysis; Logic; Polynomials; Routing;
Conference_Titel :
VLSI, 1996. Proceedings., Sixth Great Lakes Symposium on
Conference_Location :
Ames, IA
Print_ISBN :
0-8186-7502-0
DOI :
10.1109/GLSV.1996.497593
