Implementation and validation of a Five-Level STATCOM Model in the RTDS small time-step environment

In this paper, the implementation issues of a five-level STATCOM model in RTDS small time-step environment are studied. The five-level STATCOM is modeled by two small time-step VSC models and connected by a three-phase cross card Bergeron transmission line. With appropriate transmission line parameters, little voltage and current distortion is found on voltages and currents along the transmission line. The effectiveness of the STATCOM model is verified by comparing the simulation results of a test system modeled on RTDS to the results of the model from Matlab/Simulink/SimPowerSystems. The sensitivity study of the power loss provides valuable information on the actual and artificial power loss of the STATCOM model. In addition, harmonics analysis further validates the STATCOM model. From the power loss and the comparative study, the effectiveness of the STATCOM model is verified for use in a control-hardware-in-loop (CHIL) testing of the STATCOM´s controller.