DocumentCode
1588995
Title
A low power high linearity CMOS folded mixer for WiMAX application
Author
Hsiao, Chih-Lung ; Huang, Yi-Lun
Author_Institution
Dept. of Electr. Eng., Lunghwa Univ. of Sci. & Technol., Taoyuan, Taiwan
fYear
2010
Firstpage
119
Lastpage
122
Abstract
A low power high linearity folded mixer for 3.6 GHz WiMAX application is presented in this paper. The circuit was designed with TSMC 0.18μm CMOS process. An RF PMOS is used to improve the linearity. The proposed folded mixer has the conversion gain of 4.4dB with LO power at -5dBm. The IIP3 is 5.5dBm, noise figure is 11.6dB, and the power consumption is 2.636mW without output buffer. The total power consumption with output buffer is only 4.4mW under a 1V supply voltage.
Keywords
CMOS integrated circuits; MMIC mixers; WiMax; field effect MMIC; low-power electronics; power consumption; CMOS process; RF PMOS; TSMC; WiMAX application; conversion gain; frequency 3.6 GHz; low power high linearity CMOS folded mixer; power consumption; size 0.18 mum; Circuits; Energy consumption; Impedance matching; Linearity; Mixers; Noise figure; Radio frequency; Resistors; Voltage; WiMAX;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Electronics (ICSE), 2010 IEEE International Conference on
Conference_Location
Melaka
Print_ISBN
978-1-4244-6608-5
Type
conf
DOI
10.1109/SMELEC.2010.5549390
Filename
5549390
Link To Document