Differential CMOS linear power amplifier with 2nd harmonic termination at common source node

We present a 2.45 GHz fully-differential CMOS power amplifier (PA) with high efficiency and linearity. We have adopted a 0.18 μm standard CMOS process with Cu-metal and all components of the 2-stage circuit are integrated into one chip. To improve the linearity, we adopt a new harmonic termination technique at the common source along with the normal harmonic termination at the drain. The harmonic termination at the source suppresses the second harmonic generated at the input C_gs. The amplifier shows 17.5 dB of power gain and 20.5 dBm of P_1dB with 37 % of PAE. Linearity measurements from a 2-tone test show that the power amplifier with the second harmonic termination at the source improves a maximum 6 dB of IMD3 and 7 dB of IMD5 over the amplifier with harmonic termination at the drain only. Furthermore, the linearity improvements appear over the entire range of the power level and the linearity remains low below 45 dBc of IMD3 and -57 dBc of IMD5 for an output power backed-off more than 5 dB from P_1dB.