DocumentCode :
1590269
Title :
Fully integrated fractional PLL for Bluetooth application
Author :
Marletta, Marco ; Aliberti, Paolo ; Pulvirenti, Massimiliano ; Cavallaro, Alberto ; Terryn, Steven ; Filoramo, Pietro ; Iardino, Raffaele ; Spalma, Vincenzo ; Cosentino, Salvatore
Author_Institution :
STMicroelectronics, Catania, Italy
fYear :
2005
Firstpage :
557
Lastpage :
560
Abstract :
A fully integrated sigma-delta fractional-N frequency synthesizer for Bluetooth application is presented. The synthesizer, suitable to be used with a wide range of crystal oscillators, features a settling time of 70 μs, a phase noise of -80 dBc/Hz and -125 dBc/Hz at 100 KHz and 1 MHz offset respectively. The fractional spurs are -63 dBc at 1 MHz offset. The synthesizer is part of a 0.13-μm CMOS single-chip application for v1.2 Bluetooth, which has been fully qualified between -40°C and +85°C.
Keywords :
Bluetooth; CMOS integrated circuits; crystal oscillators; frequency synthesizers; integrated circuit design; integrated circuit measurement; integrated circuit noise; phase locked loops; phase noise; sigma-delta modulation; voltage-controlled oscillators; -40 to 85 C; 0.13 micron; 70 mus; Bluetooth application; CMOS single-chip application; crystal oscillator; fractional spurs; frequency offset; fully integrated fractional PLL; integrated sigma-delta fractional-N frequency synthesizer; phase noise; settling time; v1.2 Bluetooth; voltage controlled oscillators; Bluetooth; CMOS technology; Charge pumps; Costs; Delta-sigma modulation; Filters; Frequency synthesizers; Phase locked loops; Phase noise; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE
ISSN :
1529-2517
Print_ISBN :
0-7803-8983-2
Type :
conf
DOI :
10.1109/RFIC.2005.1489874
Filename :
1489874
Link To Document :
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