Combinationally irredundant ISCAS-89 benchmark circuits

We describe a procedure to remove combinationally redundant faults from a sequential circuit. The procedure removes gates, primary inputs, primary outputs and flip-flops, such that the resulting circuit is equivalent to the original circuit (by the definition given in a previous work). We present experimental results of the application of this procedure to ISCAS-89 benchmark circuits. The resulting circuits are available through anonymous ftp from ftp.eng.uiowa.edu in directory “pub/reddy/irrckts”