• DocumentCode
    1590895
  • Title

    Partitioning for minimal memory in hardware-software codesign

  • Author

    Park, Dongha ; Shin, Hyunchul

  • Author_Institution
    Dept. of Electron. Eng., Hanyang Univ., South Korea
  • Volume
    4
  • fYear
    1996
  • Firstpage
    647
  • Abstract
    In this paper, a new hardware-software partitioning algorithm is presented, in which the system behavioral description containing a mixture of hardware and software components is partitioned into hardware part and software part. The partitioning algorithm tries to minimize the given cost function under constraints on hardware resources or latency. Recursive moving of operations between hardware and software parts is used to find a near optimum partition and hill climbing is allowed to find a near optimum partition. Since memories (registers) may take substantial portion of the hardware part, memory cost is incorporated in the hardware cost. Experimental results show that our algorithm is effective in reducing memory cost without affecting other factors
  • Keywords
    computer architecture; memory architecture; minimisation; software engineering; cost function; hardware-software codesign; hill climbing; latency; minimal memory; partitioning algorithm; register; resources; Cost function; Delay; Embedded system; Field programmable gate arrays; Hardware; Partitioning algorithms; Registers; Software algorithms; Software performance; System buses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    0-7803-3073-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1996.542107
  • Filename
    542107