Cycle-accurate 8080 emulation using an ARM11 processor with dynamic binary translation

We describe the investigation of methods for cycle-accurate emulation of an Intel 8080 CPU using a low-power ARM11 CPU. Source-level optimizations and several threaded dispatch designs are explored, as well as an extreme optimization technique using direct register mapping and dynamic binary translation between the two Instruction Set Architectures. The cycle efficiency of the fastest design is nearly as fast as the original 8080 processor.