DocumentCode
159141
Title
Building faithful high-level models and performance evaluation of manycore embedded systems
Author
Nouri, Alireza ; Bozga, Marius ; Molnos, Anca ; Legay, Axel ; Bensalem, Saddek
Author_Institution
VERIMAG, Univ. Grenoble Alpes, Grenoble, France
fYear
2014
fDate
19-21 Oct. 2014
Firstpage
209
Lastpage
218
Abstract
Performance and functional correctness are key for successful design of modern embedded systems. Both aspects must be considered early in the design process to enable founded decision making towards final implementation. Nonetheless, building abstract system-level models that faithfully capture performance information along to functional behavior is a challenging task. In contrast to functional aspects, performance details are rarely available during early design phases and no clear method is known to characterize them. Moreover, once such system-level models are built they are inherently complex as they usually mix software models, hardware architecture constraints and environment abstractions. Their analysis by using traditional performance evaluation methods is reaching the limits and the need for more scalable and accurate techniques is becoming urgent. In this paper, we introduce a systematic method for building stochastic abstract performance models using statistical inference and model calibration and we propose statistical model checking as performance evaluation technique upon the obtained models. We experimented our method on a real-life case study and we were able to verify different timing properties.
Keywords
decision making; embedded systems; formal verification; multiprocessing systems; program diagnostics; abstract system-level model; decision making; environment abstraction; faithful high-level model; hardware architecture constraints; manycore embedded systems; model calibration; performance evaluation; software model; statistical inference; statistical model checking; stochastic abstract performance model; system-level model; Computational modeling; Computer architecture; Data models; Model checking; Ports (Computers); Probabilistic logic; Stochastic processes;
fLanguage
English
Publisher
ieee
Conference_Titel
Formal Methods and Models for Codesign (MEMOCODE), 2014 Twelfth ACM/IEEE International Conference on
Conference_Location
Lausanne
Type
conf
DOI
10.1109/MEMCOD.2014.6961864
Filename
6961864
Link To Document