Interconnect resources testing and faults diagnosis in field programmable gate arrays

This paper presents a testing method of the interconnect resource (IR) for Field programmable gate arrays (FPGAs) which takes the programmable switch boxes (SBs) as the core of faults testing and diagnosis by mapping faults to their corresponding configurable logic blocks (CLBs). CLBs in FPGA have also been employed to enhance driving capability. The proposed technology can achieve 100% test coverage of the SB faults in IRs, as well as precisely identify the fault type and locate faults. An in-house developed FPGA test system based on SOC hardware/software verification technology has been applied to test XC4000E family of Xilinx. The experiment results revealed that the IRs in FPGA can be tested by 6 test patterns with test vectors.