Title :
The New Scaling Paradigm
Author :
Gargini, Paolo A.
Author_Institution :
ITRS Chairman, IEEE Fellow, Director Technology Strategy, Intel Fellow
Abstract :
The FET device will lead the Silicon Nanoelectronics era until at least the beginning of the third decade of the 21st century by using the equivalent scaling approach. New process techniques like self-assembly will be required to augment the capabilities of the traditional evolution of top-down manufacturing techniques. Multiple materials will be introduced in the FET process and eventually all of the materials introduced in the 60´s will be replaced, including possibly silicon itself. Thermal limitations will most likely represent the ultimate limitation of the FET device requiring the adoption of heterogeneous integration of multiple technologies on the same substrate as a way of achieving higher system performance. Devices using other quantum state variables have been proposed and an extensive and systematic evaluation program needs to be carried on in this decade in order to identify possible candidates in the next decade for manufacturing implementation beyond the year 2020. This new device will operate in conjunction with CMOS and other types of devices in a heterogeneous integration.
Keywords :
CMOS integrated circuits; MOSFET; elemental semiconductors; nanoelectronics; self-assembly; semiconductor device manufacture; silicon; CMOS process; FET device; Si; equivalent scaling approach; multiple technologies integration; quantum state variables; self-assembly process techniques; silicon nanoelectronics; systematic evaluation program; Aluminum; Application software; Dielectrics; Electron tubes; Electronics industry; FETs; Gold; MOS devices; MOSFETs; Silicides;
Conference_Titel :
VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-1614-1
Electronic_ISBN :
1524-766X
DOI :
10.1109/VTSA.2008.4530775