Tunnel Oxide Dipole Engineering in TANOS Flash Memory for Fast Programming with Good Retention and Endurance

Author

Tan, Y.N. ; Wen, H.-C. ; Park, C. ; Gilmer, D.C. ; Young, C.D. ; Heh, D. ; Sivasubramani, P. ; Huang, J. ; Majhi, P. ; Kirsch, P.D. ; Lee, B.H. ; Tseng, H.-H. ; Jammy, R.

Author_Institution

SEMATECH, Austin, TX

fYear

2008

Firstpage

54

Lastpage

55

Abstract

Band engineering in TANOS (TaN-Al₂O₃-Si₃N₄-SiO₂-Silicon) Flash memory utilizing an interfacial dipole is demonstrated for the first time. A dipole layer at the tunnel oxide/charge storage layer interface leads to increase in programming speed while maintaining good retention and endurance. Using a dipole layer results in a 40% increase in Va, shift at program voltage V_g-V_fb, = 11 V. The performance improvement by dipole incorporation into the TANOS stack is discussed.

Keywords

aluminium compounds; elemental semiconductors; flash memories; silicon; silicon compounds; tantalum compounds; Flash memory; TaN-Al₂O₃-Si₃N₄-SiO₂-Si; dipole layer; interfacial dipole; program voltage; programming speed; tunnel oxide-charge storage layer; Batteries; Channel bank filters; Electrons; Flash memory; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Lead compounds; Silicon compounds; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

978-1-4244-1614-1

Electronic_ISBN

1524-766X

Type

conf

DOI

10.1109/VTSA.2008.4530795

Filename

4530795