DocumentCode
1593406
Title
The analysis of conduction and switching losses in multi-level inverter system
Author
Kim, Tae-Jin ; Kang, Dae-Wook ; Lee, Yo-Han ; Hyun, Dong-seok
Author_Institution
Dept. of Electr. Eng., Hanyang Univ., Seoul, South Korea
Volume
3
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
1363
Abstract
The multi-level inverter system is very promising in AC drives, when both reduced harmonic content and high power are required. But, as the output voltage level increase, the number of using the semiconductor device is increased. In case of multi-level inverter system, the loss of semiconductor devices cannot be analyzed by conventional methods. The reason is that the loss of each the semiconductor device is different from one another unlike 2-level and the diode clamped inverter system needs extra clamping diode. In this paper, a simple and accurate method of computing conduction and switching loss is proposed for multi-level inverter system. The validity of the proposed method is proven for 3-level and 4-level diode clamped inverter system
Keywords
DC-AC power convertors; harmonic distortion; invertors; losses; power conversion harmonics; power semiconductor diodes; power semiconductor switches; semiconductor device models; switching circuits; AC motor drives; clamping diode; conduction loss calculation; harmonic contents; multi-level inverter system; output voltage level; semiconductor device; switching loss calculation; Capacitors; Clamps; Power system harmonics; Pulse width modulation inverters; Semiconductor devices; Semiconductor diodes; Switching frequency; Switching loss; Topology; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics Specialists Conference, 2001. PESC. 2001 IEEE 32nd Annual
Conference_Location
Vancouver, BC
ISSN
0275-9306
Print_ISBN
0-7803-7067-8
Type
conf
DOI
10.1109/PESC.2001.954310
Filename
954310
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