Title :
pFPC: A Parallel Compressor for Floating-Point Data
Author :
Burtscher, Martin ; Ratanaworabhan, Paruj
Author_Institution :
Univ. of Texas, Austin, TX
Abstract :
This paper describes and evaluates pFPC, a parallel implementation of the lossless FPC compression algorithm for 64-bit floating-point data. pFPC can trade off compression ratio for throughput. For example, on a 4-core 3 GHz Xeon system, it compresses our nine datasets by 18% at a throughput of 1.36 gigabytes per second and by 41% at a throughput of 570 megabytes per second. Decompression is even faster. Our experiments show that the thread count should match or be a small multiple of the data´s dimensionality to maximize the compression ratio and the chunk size should be at least equal to the system´s page size to maximize the throughput.
Keywords :
shared memory systems; FPC compression algorithm; Xeon system; compression ratio maximization; floating-point data; frequency 3 GHz; parallel compressor; Application software; Bandwidth; Compression algorithms; Data compression; Encoding; Flexible printed circuits; Multidimensional systems; Parallel algorithms; Throughput; Yarn; FPC algorithm; data compression; floating-point compression; parallel compression;
Conference_Titel :
Data Compression Conference, 2009. DCC '09.
Conference_Location :
Snowbird, UT
Print_ISBN :
978-1-4244-3753-5
DOI :
10.1109/DCC.2009.43