Fully stacked 3D devices in electron beam recrystallised material

Summary form only given. The use of a dual-electron-beam recrystallization system to form the SOI material for the fabrication of fully stacked devices is described. One electron beam is rapidly raster scanned across the underside of the wafer to provide uniform, isothermal heating to a background temperature of 950°C. The second electron beam is incident from above and is formed into a line by scanning with a 100-kHz triangle-wave deflection signal. One row of die is recrystallized with each sweep of the beam, and the wafer is mechanically stepped sideways between sweeps to recrystallize complete wafers, with the background heating following to maintain thermal uniformity. The best quality material results when the regrowth from the melt is seeded from the underlying substrate through windows cut in the isolating oxide. The structure of the fully stacked devices fabricated (SMOS) is illustrated. This structure contains p-channel MOS transistors in the bulk silicon and n-channel devices in the SOI layer directly above. An example of a transfer characteristic from a stacked inverter is given, showing that the recrystallization step does not significantly affect the bulk device performance