Poly flanked VDMOS (PFVDMOS): a superior technology for superjunction devices

Author

Gan, K.P. ; Liang, Yung C. ; Samudra, Ganesh S. ; Xu, S.M. ; Yong, Liu

Author_Institution

Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore

Volume

4

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

2156

Abstract

A novel VDMOS structure, named poly flanked VDMOS (PFVDMOS), is proposed for the first time to provide a better performance and process technology for superjunction MOSFET devices. The structure contains a thin oxide barrier to eliminate the existing p-n lateral interdiffusion problem, thus both the n-epi and p poly column widths can be reduced to a minimum. This reduction in column width enables the device to have a much higher n-epi doping concentration. In a sense, it leads to an optimal reduction in on-state resistance compared to other existing structures for the same voltage rating

Keywords

chemical interdiffusion; p-n junctions; power MOSFET; semiconductor doping; n-epi column width; n-epi doping concentration; on-state resistance optimal reduction; p poly column width; p-n lateral interdiffusion problem; poly flanked VDMOS; process technology; superjunction MOSFET devices; thin oxide barrier; Anisotropic magnetoresistance; Doping; Etching; Gallium nitride; Implants; MOSFET circuits; Microelectronics; Neodymium; Silicon; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics Specialists Conference, 2001. PESC. 2001 IEEE 32nd Annual

Conference_Location

Vancouver, BC

ISSN

0275-9306

Print_ISBN

0-7803-7067-8

Type

conf

DOI

10.1109/PESC.2001.954439

Filename

954439