DocumentCode :
159687
Title :
Minimum Effort Design Space Subsetting for Configurable Caches
Author :
Alsafrjalani, Mohamad Hammam ; Gordon Ross, Ann ; Viana, Phillip
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Florida (UF), Gainesville, FL, USA
fYear :
2014
fDate :
26-28 Aug. 2014
Firstpage :
65
Lastpage :
72
Abstract :
Configurable caches can significantly reduce energy consumption by adapting the system´s cache configuration to the applications´ specific requirements to meet system design and optimization goals. However, large configuration design spaces require prohibitive design space exploration time (e.g., due to lengthy design space analyses, simulations, and/or evaluations) to determine the best configuration given these requirements and goals. To significantly reduce design space exploration time, we evaluate a design space subsetting method that removes energy-redundant configurations (i.e., configurations that provide similar energy savings as other configurations), thus significantly reducing the design space while still providing high-quality, energy-saving configurations. Prior work verified design space subsetting´s efficacy, however, prior work required extensive design-time effort and complete a priori knowledge of the system´s anticipated applications. In this work, we alleviate these limitations and significantly broaden the usability of design space subsetting. Results show that complete a priori knowledge of the anticipated applications is not necessary, and only a small set of applications representative of the anticipated applications´ general domains (or applications with similar requirements) is sufficient to provide energy savings within 5.6% of the complete, unsubsetted design space.
Keywords :
cache storage; power aware computing; configurable caches; design space subsetting method; energy savings; energy-saving configurations; usability; Algorithm design and analysis; Energy consumption; Optimization; Space exploration; System analysis and design; Training; Tuning; Design space exploration; cache tuning; configurable caches; design space subsetting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded and Ubiquitous Computing (EUC), 2014 12th IEEE International Conference on
Conference_Location :
Milano
Type :
conf
DOI :
10.1109/EUC.2014.19
Filename :
6962269
Link To Document :
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