Title :
Translation of specifications in hierarchical analog LSI design
Author :
Fuad Mas´ud, A. ; Ohtsuka, Tomohiko ; Kunieda, Hiroaki
Author_Institution :
Dept. of Electr. & Electron. Eng., Tokyo Inst. of Technol., Japan
Abstract :
This paper proposes a novel approach for translation of specifications from system level to the next lower level. First, a prescribed response surface model is employed to approximate each output response y(x) over a region of interest Ω of a vector of design variables x. The problem is to choose n distinct sampling points xi (i=1,...,n) from Ω at which observations y(xi) are to be taken. The data (y(xi), xi) are used to determine the parameter values of the response surface model. The derived response surface model and the constraints on the output responses are then transformed into interval-inequality-constrained optimization problem. Interval methods consist a set of procedures for interval arithmetics. They provide solutions for the optimization problem in form of hyperbox space of design variables. This hyperbox is suitable for independent translation of specifications from system level to the next lower level. Our approach successfully applies to analog PLL design
Keywords :
analogue integrated circuits; circuit CAD; circuit optimisation; integrated circuit design; large scale integration; phase locked loops; analog PLL design; design variables; hierarchical analog LSI design; hyperbox space; interval arithmetic; interval-inequality-constrained optimization problem; output responses; prescribed response surface model; sampling points; specifications translation; Arithmetic; Constraint optimization; Design methodology; Design optimization; Educational institutions; Large scale integration; Phase locked loops; Response surface methodology; Sampling methods;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.542129