Title :
Simulating systolic arrays on MasPar machines
Author :
Zehendner, Eberhard
Author_Institution :
Inst. fur Inf., Friedrich-Schiller-Univ., Jena, Germany
Abstract :
Systolic arrays and SIMD computers apparently share several common features. By careful analysis we show that current SIMD computers are in no way able to match the performance of general systolic arrays, due to small bandwidth and inflexible communication between host computer and SIMD processor array, as well as insufficient local memory on the processor elements. Quantitative experimental research on MasPar MP-I and MP-2 SIMD machines validates our theoretical conclusions. Our research implicitly exhibits why SIMD computers frequently do not match the expectations. We propose modifications of current SIMD architectures that could considerably improve the performance of SIMD machines.
Keywords :
parallel machines; systolic arrays; virtual machines; MP-2 SIMD machines; MasPar MP-I; MasPar machines; SIMD architectures; SIMD computers; SIMD processor array; general systolic arrays; host computer; local memory; processor elements; quantitative experimental research; systolic array simulation; Bandwidth; Computational modeling; Computer aided instruction; Computer architecture; Computer interfaces; Computer simulation; Image analysis; Proposals; Stress; Systolic arrays;
Conference_Titel :
EUROMICRO 97. New Frontiers of Information Technology., Proceedings of the 23rd EUROMICRO Conference
Conference_Location :
Budapest, Hungary
Print_ISBN :
0-8186-8129-2
DOI :
10.1109/EURMIC.1997.617337
