Title :
Unified multi-bit overlapped-scanning multiplier algorithm
Author :
Vassiliadis, Stamatis ; Putrino, Michael ; Schwarz, Eric M.
Author_Institution :
IBM Glendale Lab., Endicott, NY, USA
fDate :
10/19/1988 12:00:00 AM
Abstract :
The authors introduce a unique formulation of multiplication for different notations with the unification of the multi-bit overlapped-scanning technique. Specifically, an algorithm for integer and fractional number representations is described for the two´s-complement, sign-magnitude, one´s-complement, and unsigned notations. It is indicated that a fractional, two´s-complement multiplier with minor modifications can accommodate all the notations for integer and fractional representations. The minor modifications include the design of an (n+1)×(n+1) instead of an n×n multiplier with circuits for pre- and post-one´s-complementation, and proper computation of the sign
Keywords :
digital arithmetic; multiplying circuits; algorithm; fractional number representations; integer representations; multi-bit overlapped-scanning technique; one´s-complement; sign-magnitude; two´s-complement; unsigned notations; Algorithm design and analysis; Computer architecture; Control systems; Digital arithmetic; Hardware; Iterative algorithms; Laboratories;
Conference_Titel :
Southern Tier Technical Conference, 1988., Proceedings of the 1988 IEEE
Conference_Location :
Binghamton, NY
DOI :
10.1109/STIER.1988.95468