Direct-mapped asynchronous finite-state machines in CMOS technology

Author

Sotiriou, Christos P.

Author_Institution

Inst. for Comput. Sci., Found. for Res. & Technol. - Hellas, Crete, Greece

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

105

Lastpage

109

Abstract

Conventional asynchronous control circuit design is complex because potential designs must be analysed for the existence of hazards and state variable races, as these may cause incorrect circuit operation. We present the innovative CMOS direct-mapped asynchronous circuit design approach, which, by defining a one-to-one mapping between state diagram and CMOS circuit implementation, removes the need for race and hazard circuit analysis It allows for regular, fast, multiple-input-change, nonfundamental mode asynchronous control circuits to be realised in CMOS technology

Keywords

CMOS logic circuits; SPICE; VLSI; asynchronous circuits; finite state machines; hazards and race conditions; integrated circuit design; logic CAD; logic simulation; CMOS technology; asynchronous control circuit; direct-mapped asynchronous finite-state machines; hazards; multiple-input-change circuits; one-to-one mapping; state diagram; state variable races; Asynchronous circuits; CMOS process; CMOS technology; Circuit noise; Circuit synthesis; Clocks; Computer science; Delay; Encoding; Hazards;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International

Conference_Location

Arlington, VA

Print_ISBN

0-7803-6741-3

Type

conf

DOI

10.1109/ASIC.2001.954681

Filename

954681