A low-phase-noise CMOS ring oscillator with differential control and quadrature outputs

Author

Dai, Liang ; Harjani, Ramesh

Author_Institution

Minnesota Univ., Minneapolis, MN, USA

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

134

Lastpage

138

Abstract

This paper presents a two-stage 3.3V ring VCO in a 0.35μm CMOS technology with differential control and quadrature outputs. The measured common mode noise rejection at 1MHz is 32dB better than for a single-ended control topology. It also has improved supply noise rejection which is 38dB better than conventional differential ring oscillator at 320MHz. The measured phase noise is -117dBc/Hz at a 1MHz offset from the 973MHz center frequency. Since the trend of low-voltage operation degrades oscillator phase noise, our design is particularly well suited for low voltage high performance systems

Keywords

CMOS integrated circuits; circuit simulation; integrated circuit design; integrated circuit noise; interference (signal); nonlinear network synthesis; phase noise; voltage-controlled oscillators; 0.35 micron; 0.35μm CMOS technology; 1 MHz; 1MHz; 3.3 V; 3.3V ring VCO; 32 dB; 320MHz; 38 dB; 973 MHz; 973MHz center frequency; common mode noise rejection; differential control; differential ring oscillator; oscillator phase noise; phase noise; quadrature outputs; single-ended control topology; supply noise rejection; two-stage ring VCO; CMOS technology; Degradation; Frequency measurement; Low voltage; Noise measurement; Phase measurement; Phase noise; Ring oscillators; Topology; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International

Conference_Location

Arlington, VA

Print_ISBN

0-7803-6741-3

Type

conf

DOI

10.1109/ASIC.2001.954686

Filename

954686