Title :
Estimating interconnect wirelength for soft IP
Author :
Hung, Patrick ; Séméria, Luc ; Flynn, Michael J.
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
fDate :
6/23/1905 12:00:00 AM
Abstract :
As interconnect begins to play a dominant role in determining the performance and power consumption of a chip, accurate wirelength estimation becomes increasingly important. This paper presents an a priori wirelength distribution model for soft IP as a function of aspect ratio and routing obstacles. Experimental results are shown to illustrate the effectiveness of the model
Keywords :
VLSI; integrated circuit interconnections; integrated circuit layout; network routing; parameter estimation; IP blocks; VLSI design; aspect ratio; interconnect wirelength; rectangular blocks; routing obstacles; soft IP; wirelength distribution model; wirelength estimation; Density functional theory; Distribution functions; Energy consumption; Equations; Power system interconnection; Power system modeling; Routing; Shape; Upper bound; Wires;
Conference_Titel :
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location :
Arlington, VA
Print_ISBN :
0-7803-6741-3
DOI :
10.1109/ASIC.2001.954691
