Reprogrammable processing capabilities of embedded FPGA blocks

Modern signal processing applications and other compute intensive algorithms can be implemented in fixed ASIC logic to improve performance. The drawback of doing so is that the design is forever fixed with a standard, protocol or algorithm. The availability of embeddable FPGA cells in ASIC systems allows the designer to set the algorithm in ´reprogrammable´ logic. Further, the embedded LiquidLogic core (LL) architecture from LSI Logic, provides the ability to manipulate the implemented algorithm at run-time allowing the design to adapt the function in real-time. This paper presents a theoretical ASIC design that utilizes these capabilities and describes dependencies for developing a class of SoC devices