Title :
Block-based multi-period refresh for energy efficient dynamic memory
Author :
Kim, Joohee ; Papaefthymiou, Marios C.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fDate :
6/23/1905 12:00:00 AM
Abstract :
Conventional DRAMs use a single refresh period determined by the cell with the largest leakage. This approach is simple but dissipative, because it forces unnecessary refreshes for the majority of the cells with small leakage. In this paper we investigate a novel scheme that relies on multiple refresh periods and small refresh blocks to reduce DRAM dissipation by decreasing the number of cells refreshed too often. Long periods are used to accommodate cells with small leakage. In contrast to conventional row-based refresh, small refresh blocks are used to increase worst-case data retention times. Retention times are further extended by adding a swap cell to each refresh block. We give a novel polynomial-time algorithm for computing an optimal set of refresh periods for block-based multiperiod refresh. Specifically, given an integer K and a distribution of data retention times, in O(KN2) steps our algorithm computes K refresh periods that minimize DRAM dissipation, where N is the number of refresh blocks in the memory. We describe and evaluate a possible implementation of our refresh scheme. In simulations with a 16 Mb DRAM, block-based multi-rate refresh reduces standby dissipation by a multiplicative factor of 4 with area overhead below 6%
Keywords :
DRAM chips; leakage currents; low-power electronics; 16 Mbit; DRAM; block-based multi-period refresh; data retention time; dynamic memory; energy efficiency; leakage current; polynomial time algorithm; power dissipation; swap cell; Capacitors; Computational modeling; Computer architecture; DRAM chips; Energy efficiency; Laboratories; Leakage current; Polynomials; Power dissipation; Random access memory;
Conference_Titel :
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location :
Arlington, VA
Print_ISBN :
0-7803-6741-3
DOI :
10.1109/ASIC.2001.954696