Reexamining the stability of a parallel packet switch with bufferless input demultiplexors

A counter example is given to contradict an impressive result published recently about the stability of a parallel packet switch with bufferless input demultiplexors. While it was claimed in [Denis et al., June 2001] that the number of switching planes K should be at least 2[R/r] - 1 to make the PPS stable, we give a stable PPS with K = [R/r] + 1, where R and r is the rate of external and internal ports of the PPS respectively. To justify the validness of the counter example, we introduce a new mathematical model of the demultiplexors in the PPS, which would be useful in the investigation of the stability of the PPS architecture in general.