Design of a reusable memory management system

Author

Agun, Kugan S. ; Chang, J.M.

Author_Institution

Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL, USA

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

369

Lastpage

373

Abstract

Presents a design and implementation of active memory manager unit (AMMU) which can be embedded into system-on-chip CPUs. The unit is implemented using VHDL in field programmable gate array (FPGA). The modified buddy system is used as the hardware algorithm for memory management. RISC compatible open-source CPU is deployed with the memory management unit to demonstrate the feasibility of implementation. The results indicate that the proposed AMMU achieves high performance in memory allocation and deallocation for software systems

Keywords

application specific integrated circuits; field programmable gate arrays; hardware description languages; microprocessor chips; reduced instruction set computing; storage management; FPGA; RISC compatible open-source CPU; VHDL; active memory manager unit; hardware algorithm; memory allocation; memory deallocation; modified buddy system; reusable memory management system; system-on-chip CPUs; Application software; Computer science; Field programmable gate arrays; Hardware design languages; Intellectual property; Memory management; Microprocessors; Open source software; Reduced instruction set computing; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International

Conference_Location

Arlington, VA

Print_ISBN

0-7803-6741-3

Type

conf

DOI

10.1109/ASIC.2001.954729

Filename

954729