DocumentCode :
159974
Title :
Heterogeneous cores for MapReduce processing: Opportunity or challenge?
Author :
Feng Yan ; Cherkasova, Ludmila ; Zhuoyao Zhang ; Smirni, Evgenia
Author_Institution :
Hewlett-Packard Labs., Palo Alto, CA, USA
fYear :
2014
fDate :
5-9 May 2014
Firstpage :
1
Lastpage :
4
Abstract :
To offer diverse computing capabilities, the emergent modern system on a chip (SoC) might include heterogeneous multi-core processors. The current SoC design is often constrained by a given power budget that forces designers to consider different decision trade-offs, e.g., to choose between many slow cores, fewer faster cores, or to select a combination of them. In this work, we design a new Hadoop scheduler, called DyScale, that exploits capabilities offered by heterogeneous cores for achieving a variety of performance objectives. Our preliminary performance evaluation results confirm potential benefits of heterogeneous multi-core processors for “faster” processing of the small, interactive MapReduce jobs, while at the same time offering an improved throughput and performance for large, batch job processing.
Keywords :
system-on-chip; DyScale; Hadoop scheduler; MapReduce jobs; MapReduce processing; SoC design; batch job processing; decision trade-offs; diverse computing capabilities; heterogeneous cores; heterogeneous multicore processors; system-on-chip; Multicore processing; Processor scheduling; Program processors; Resource management; Servers; System-on-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Network Operations and Management Symposium (NOMS), 2014 IEEE
Conference_Location :
Krakow
Type :
conf
DOI :
10.1109/NOMS.2014.6838339
Filename :
6838339
Link To Document :
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