Cost components for 3D system integration

Author

Velenis, Dimitrios ; Detalle, Mikael ; Van Huylenbroeck, Stefaan ; Jourdain, Anne ; Phommahaxay, A. ; Slabbekoorn, John ; Teng Wang ; Marinissen, Erik Jan ; Rebibis, Kenneth June ; Miller, Alice ; Beyer, G. ; Beyne, Eric

Author_Institution

Imec, Leuven, Belgium

fYear

2014

fDate

16-18 Sept. 2014

Firstpage

1

Lastpage

5

Abstract

The cost of 3D process flows is one of the most important aspects for the broader adoption of 3D integration by the semiconductor industry. In this paper the processing cost of the features and components that enable 3D stacking is considered and compared. Different stacking approaches are considered: D2W, W2W and interposer-based stacking. Furthermore, the impact of processing yield and pre-stack testing is evaluated when considering the system integration cost for each one of the 3D stacking methods. In addition the size of the stacked active dies is parameterized and the effect on the system integration cost is explored. Also, the impact of pre-stack testing on interposer in relation to processing yield and the size of the stacked active dies is investigated.

Keywords

integrated circuit manufacture; three-dimensional integrated circuits; 3D process flows; 3D system integration; D2W stacking; W2W stacking; cost components; interposer-based stacking; prestack testing; processing yield; semiconductor industry; stacked active dies; CMOS integrated circuits; Compounds; Integrated circuit interconnections; Stacking; Substrates; Testing; Three-dimensional displays;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics System-Integration Technology Conference (ESTC), 2014

Conference_Location

Helsinki

Type

conf

DOI

10.1109/ESTC.2014.6962730

Filename

6962730