DocumentCode
1599838
Title
Global routing methodology for analog and mixed-signal layout
Author
Sajid, Khusro ; Carothers, Jo Dale ; Rodriguez, Jefrey J. ; Holman, W. Timothy
Author_Institution
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
442
Lastpage
446
Abstract
This paper presents an efficient methodology for automatic routing of analog; circuits. The analog routing techniques, presented here, when combined with our previous and ongoing work in, digital routing, will provide an integrated mixed-signal routing environment. Routing in analog VLSI is much more complex than that in digital VLSI circuits. Unlike digital VLSI routing, the goal in analog routing is not simply to minimize area,or reduce total interconnect length. Performance constraints such as matching of parasitics on differential pairs, effects of parasitic capacitance on signal nets, and voltage drops, especially in high current nets, need to be considered and satisfied. The algorithm described in this work generates candidate routes for all nets to be and allows considered simultaneously for compatibility, for incorporation of flexible models for addressing the analog-specific concerns
Keywords
VLSI; analogue integrated circuits; circuit CAD; circuit layout; mixed analogue-digital integrated circuits; network routing; addressing; analog VLSI; analog circuits; automatic routing; flexible models; integrated mixed-signal routing; matching of parasitics; parasitic capacitance; symmetric circuits; voltage drops; Analog circuits; Analog computers; Coupling circuits; Crosstalk; Integrated circuit interconnections; Parasitic capacitance; Routing; Sensitivity analysis; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location
Arlington, VA
Print_ISBN
0-7803-6741-3
Type
conf
DOI
10.1109/ASIC.2001.954742
Filename
954742
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