Title :
Si nanowire memory
Author :
Rizk, Ayman ; Nayfeh, Ammar
Author_Institution :
Masdar Inst. of Sci. & Technol., Abu Dhabi, United Arab Emirates
Abstract :
A novel Si nanowire memory cell is demonstrated by Physics Based TCAD simulation. The device utilizes the metal gate work function and the applied gate voltage to create potential barriers that trigger a positive feedback effect. Remarkably low voltage memory operation ~1V is achieved with extremely long retention times (19.5s). The device is based on current high-κ metal gate technology and can be fabricated using standard CMOS process integration.
Keywords :
CMOS integrated circuits; elemental semiconductors; integrated memory circuits; nanowires; silicon; technology CAD (electronics); CMOS; Si; applied gate voltage; current high-κ metal gate technology; low voltage memory operation; metal gate work function; nanowire memory cell; physics based TCAD simulation; positive feedback effect; time 19.5 s; voltage 1 V; Logic gates; Metals; Memory; Nanowire; Retention;
Conference_Titel :
Nanotechnology (IEEE-NANO), 2012 12th IEEE Conference on
Conference_Location :
Birmingham
Print_ISBN :
978-1-4673-2198-3
DOI :
10.1109/NANO.2012.6322066
