DocumentCode
1600917
Title
Macroporous silicon FET transistors for power applications
Author
Vega, David ; Najar, R. ; Pina, M. ; Rodriguez, Alex
Author_Institution
Dept. d´Eng. Eletron., Univ. Politec. de Catalunya, Barcelona, Spain
fYear
2013
Firstpage
91
Lastpage
94
Abstract
In this paper we propose the use of macroporous silicon for microelectronic devices. We propose and study four different FET transistor structures using macroporous silicon as base material. Macroporous silicon is a novel material whose application most commonly suggested is as photonic crystals. Nevertheless, this is a versatile structured material with applications in many different areas, though microelectronics is not usually cited. We suggest its use for electronics devices as a FET transistor. The presented structures are studied by simulation in device modelling software (TCAD). Two kinds of operation modes have been considered: vertical (axial) and horizontal (transverse) in relation to the etched pores in silicon. One of the notable features of the described structures is the ability to have a massive number of identical unitary-cell transistor devices operating in parallel, having an all-around gate. These features allow driving the gate with low controlling voltages while handling large current density. Furthermore, the external device volume remains small thanks to the very large area-to-volume ratio. Thanks to the considerable amount of active area achievable, we further propose the use of such devices for low-voltage power applications. In this paper we present the obtained results of our simulations of the proposed devices.
Keywords
current density; elemental semiconductors; field effect transistors; low-power electronics; semiconductor device models; silicon; technology CAD (electronics); Si; TCAD; all-around gate; area-to-volume ratio; axial operation mode; current density; device modelling software; horizontal operation mode; low-voltage power applications; macroporous silicon FET transistors; microelectronic devices; photonic crystals; transverse operation mode; unitary-cell transistor devices; vertical operation mode; Fabrication; JFETs; Logic gates; Silicon; 3-D transistor; FET transistors; all-around gate; device modelling; maroporous silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices (CDE), 2013 Spanish Conference on
Conference_Location
Valladolid
Print_ISBN
978-1-4673-4666-5
Electronic_ISBN
978-1-4673-4667-2
Type
conf
DOI
10.1109/CDE.2013.6481350
Filename
6481350
Link To Document