DocumentCode :
1601102
Title :
An 8-bit 1.42GS/s 0.54mW CMOS Flash ADC
Author :
Hsieh, You-Yi ; Lin, Zhi-Ming
Author_Institution :
Grad. Inst. of Integrated Circuit Design, Nat. Changhua Univ. of Educ., Changhua, Taiwan
fYear :
2011
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents an 8-bit Flash Analog-to-Digital converter (ADC) implemented in 0.18-μm CMOS process. Different from the conventional Flash ADCs, we use a single MOS comparator technique to replace the traditional comparator. Therefore, our method can reduce a lot of transistor numbers, chip area, power consumption for higher resolution. The designed Flash ADC consumes only 0.54 mW from a 1.8V power supply. The speed of this design is 1.4GS/s. The simulated static differential non-linearity error (DNL) and integral non-linearity error (INL) are between 0.4/-0.4 LSB and 0.42/-0.55 LSB, respectively.
Keywords :
CMOS memory circuits; analogue-digital conversion; comparators (circuits); flash memories; (DNL); CMOS flash ADC; CMOS flash analog-to- digital converter; INL; MOS comparator technique; bit rate 1.42 Gbit/s; differential nonlinearity error; integral nonlinearity error; power 0.54 mW; voltage 1.8 V; word length 8 bit; CMOS integrated circuits; Inverters; MOS devices; Power demand; Reflective binary codes; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information, Communications and Signal Processing (ICICS) 2011 8th International Conference on
Conference_Location :
Singapore
Print_ISBN :
978-1-4577-0029-3
Type :
conf
DOI :
10.1109/ICICS.2011.6173519
Filename :
6173519
Link To Document :
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