Ballistic deflection transistor: Geometry dependence and boolean operations

In this work, a room temperature study of ballistic deflection transistors (BDTs) is performed. By applying various processing steps such as hard mask deposition, e-beam lithography, reactive ion etching, etc., BDTs were fabricated, and the interplay between the geometry and their performance is analyzed. The importance of the top drain terminal is also examined. The application of the BDT for different logic configurations on the basis of its asymmetric biasing behavior is studied. Using this concept, even a single BDT can be used as a logic gate.